Optimum Implementation of Elliptic Curve Cryptosystems on the SRC-6E Reconfigurable Computer

Reconfigurable Computers are general-purpose high-end computers based on a hybrid architecture and close system-level integration of traditional microprocessors and Field Programmable Gate Arrays (FPGAs). It is expected that programming of reconfigurable computers should not require any knowledge of hardware design, assuming that sufficiently large library of elementary operations has been earlier developed and made available to end users. The emergence of reconfigurable computers offers a great promise in terms of progress in many traditionally hard cryptographic problems [1]. Many of such problems, such as integer factorization, elliptic curve discrete logarithm problem, or counting the number of points on an elliptic curve have been shown in theory to execute substantially more efficiently in hardware [2, 3]. At the same time, no prototypes confirming these claims have been reported in the open literature for practical sizes of cryptographic parameters because of the prohibitive cost of specialized hardware. Although a lot of work has been done in the area of reconfigurable computing and run-time reconfiguration, we are aware of only a few practical implementations of general-purpose reconfigurable computers [4, 5]. SRC-6E from SRC Computers, Inc. was chosen for our study [4]. Our goal was not only to confirm the great potential for effective use of reconfigurable computers in cryptography, but also to determine the current and possible future limitations of the reconfigurable computing technology. We chose as our benchmark a relatively complex cryptographic operation: Elliptic Curve scalar multiplication over GF(2) with a polynomial basis representation [6, 7, 8]. This operation forms a basis of Elliptic Curve Cryptosystems and is perfect for our goals, as it involves a three-level hierarchy of operations. Our goal was to find out, which level functions need to be implemented by a hardware designer as library macros, and at what level the software designer can take over. Our paper gives an answer to this question for the current generation of reconfigurable computers, and provides some predictions on how this answer can evolve in time.